Compact noise modelling for common double-gate metal-oxide-semiconductor field-effect transistor adapted to gate-oxide-thickness asymmetry

Sharan, Neha and Mahapatra, Santanu (2016) Compact noise modelling for common double-gate metal-oxide-semiconductor field-effect transistor adapted to gate-oxide-thickness asymmetry. In: IET CIRCUITS DEVICES & SYSTEMS, 10 (1). pp. 62-67.

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Abstract

On the basis of the quasi-linear relationship between the surface potentials of a common double-gate metal-oxide-semiconductor field-effect transistor, a compact noise model, which is adapted to gate-oxide-thickness asymmetry, is proposed. The proposed model includes a physics-based thermal and flicker noise model. The effect of the lateral and vertical electric fields on the mobility degradation has also been taken into account for accurate noise prediction in short-channel devices. The thermal noise model is compared with the technology computer aided design (TCAD) simulation data and good agreement is observed. The proposed noise model appears to be efficient for analogue circuit simulation.

Item Type:	Journal Article
Publication:	IET CIRCUITS DEVICES & SYSTEMS
Publisher:	INST ENGINEERING TECHNOLOGY-IET
Additional Information:	Copy right for this article belongs to the INST ENGINEERING TECHNOLOGY-IET, MICHAEL FARADAY HOUSE SIX HILLS WAY STEVENAGE, HERTFORD SG1 2AY, ENGLAND
Department/Centre:	Division of Electrical Sciences > Electronic Systems Engineering (Formerly Centre for Electronic Design & Technology)
Date Deposited:	30 Jun 2016 05:29
Last Modified:	30 Jun 2016 05:29
URI:	http://eprints.iisc.ac.in/id/eprint/54105

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