Swain, Peeyusha Saurabha and Shrivastava, Mayank and Baghini, Maryam Shojaei and Gossner, Harald and Rao, Valipe Ramgopal (2016) On the Geometrically Dependent Quasi-Saturation and g(m) Reduction in Advanced DeMOS Transistors. In: IEEE TRANSACTIONS ON ELECTRON DEVICES, 63 (4). pp. 1621-1629.
Full text not available from this repository. (Request a copy)Abstract
This paper reveals an early quasi-saturation (QS) effect attributed to the geometrical parameters in shallow trench isolation-type drain-extended MOS (STI-DeMOS) transistors in advanced CMOS technologies. The quasi-saturation effect leads to serious g(m) reduction in STI-DeMOS. This paper investigates the nonlinear resistive behavior of the drain-extended region and its impact on the particular behavior of the STI-DeMOS transistor. In difference to vertical DMOS or lateral DMOS structures, STI-DeMOS exhibits three distinct regions of the drain extension. A complete understanding of the physics in these regions and their impact on the QS behavior are developed in this paper. An optimization strategy is shown for an improved g(m) device in a state-of-the-art 28-nm CMOS technology node.
| Item Type: | Journal Article |
|---|---|
| Publication: | IEEE TRANSACTIONS ON ELECTRON DEVICES |
| Publisher: | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC |
| Additional Information: | Copy right for this article belongs to the IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC, 445 HOES LANE, PISCATAWAY, NJ 08855-4141 USA |
| Keywords: | Drain length (DL); g(m) reduction; overlap region; quasi-saturation (QS); shallow trench isolation-type drain-extended MOS (STI-DeMOS) |
| Department/Centre: | Division of Electrical Sciences > Electronic Systems Engineering (Formerly Centre for Electronic Design & Technology) |
| Date Deposited: | 28 Apr 2016 06:05 |
| Last Modified: | 28 Apr 2016 06:05 |
| URI: | http://eprints.iisc.ac.in/id/eprint/53713 |
Actions (login required)
 |
View Item |
