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Toward a Scalable Working Set Size Estimation Method and Its Application for Chip Multiprocessors

Dani, Aparna Mandke and Amrutur, Bharadwaj and Srikant, YN (2012) Toward a Scalable Working Set Size Estimation Method and Its Application for Chip Multiprocessors. In: IEEE TRANSACTIONS ON COMPUTERS, 63 (6). pp. 1566-1578.

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Official URL: http://dx.doi.org/10.1109/TC.2012.291

Abstract

It is essential to accurately estimate the working set size (WSS) of an application for various optimizations such as to partition cache among virtual machines or reduce leakage power dissipated in an over-allocated cache by switching it OFF. However, the state-of-the-art heuristics such as average memory access latency (AMAL) or cache miss ratio (CMR) are poorly correlated to the WSS of an application due to 1) over-sized caches and 2) their dispersed nature. Past studies focus on estimating WSS of an application executing on a uniprocessor platform. Estimating the same for a chip multiprocessor (CMP) with a large dispersed cache is challenging due to the presence of concurrently executing threads/processes. Hence, we propose a scalable, highly accurate method to estimate WSS of an application. We call this method ``tagged WSS (TWSS)'' estimation method. We demonstrate the use of TWSS to switch-OFF the over-allocated cache ways in Static and Dynamic NonUniform Cache Architectures (SNUCA, DNUCA) on a tiled CMP. In our implementation of adaptable way SNUCA and DNUCA caches, decision of altering associativity is taken by each L2 controller. Hence, this approach scales better with the number of cores present on a CMP. It gives overall (geometric mean) 26% and 19% higher energy-delay product savings compared to AMAL and CMR heuristics on SNUCA, respectively.

Item Type: Journal Article
Publication: IEEE TRANSACTIONS ON COMPUTERS
Publisher: IEEE COMPUTER SOC
Additional Information: Copy right for this article belongs to the IEEE COMPUTER SOC
Keywords: Chip multiprocessors (CMPs); working set size (WSS) estimation; variable cache associativity
Department/Centre: Division of Electrical Sciences > Electrical Communication Engineering
Date Deposited: 14 Aug 2014 10:20
Last Modified: 14 Aug 2014 10:20
URI: http://eprints.iisc.ac.in/id/eprint/49556

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