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NUcache: an efficient multicore cache organization based on next-use distance

Manikantan, R and Rajan, Kaushik and Govindarajan, Ramaswamy (2011) NUcache: an efficient multicore cache organization based on next-use distance. In: 2011 IEEE 17th International Symposium on High Performance Computer Architecture (HPCA), 12-16 Feb. 2011, San Antonio, TX.

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Official URL: http://dx.doi.org/10.1109/HPCA.2011.5749733

Abstract

The effectiveness of the last-level shared cache is crucial to the performance of a multi-core system. In this paper, we observe and make use of the DelinquentPC - Next-Use characteristic to improve shared cache performance. We propose a new PC-centric cache organization, NUcache, for the shared last level cache of multi-cores. NUcache logically partitions the associative ways of a cache set into MainWays and DeliWays. While all lines have access to the MainWays, only lines brought in by a subset of delinquent PCs, selected by a PC selection mechanism, are allowed to enter the DeliWays. The PC selection mechanism is an intelligent cost-benefit analysis based algorithm that utilizes Next-Use information to select the set of PCs that can maximize the hits experienced in DeliWays. Performance evaluation reveals that NUcache improves the performance over a baseline design by 9.6%, 30% and 33% respectively for dual, quad and eight core workloads comprised of SPEC benchmarks. We also show that NUcache is more effective than other well-known cache-partitioning algorithms.

Item Type: Conference Paper
Publisher: IEEE
Additional Information: Copyright of this article belongs to IEEE.USA
Department/Centre: Division of Electrical Sciences > Computer Science & Automation
Division of Interdisciplinary Sciences > Supercomputer Education & Research Centre
Date Deposited: 18 Mar 2013 10:48
Last Modified: 18 Mar 2013 10:48
URI: http://eprints.iisc.ac.in/id/eprint/46026

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