Pal, Bhaskar and Chhetan, Nawang and Dasgupta, Pallab and Chakrabarti, Partha P and Nandi, Anindyasundar (2006) H-DBUG: A High-level Debugging Framework for Protocol Verification using Assertions. In: 2005 Annual IEEE INDICON, 11-13 Dec. 2005, Chennai, India.
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Abstract
The success of an ABV IP depends highly on the associated debugging environment. An efficient debugging environment helps the user to find out the exact location of the failure. Moreover, it provides information to the user in a refined detail of abstraction and permit adequate interaction. It has also been realized that adequate visualization support helps in tracking the behavioral aspects of the Design Under Test (DUT). Currently, the debugging tools provide information in the signal level and do not provide any information about the high-level behavior of the DUT. We present a debugging framework that takes the design specification, assertions and the user intent in a simple format and provides detailed information by processing the design trace on-line, or off-line. We also present a visualization framework to ease the debugging procedure. We have experimented with industrial standard on-chip bus protocols that ensure that this utility can be incorporated successfully in the present functional verification flow.
Item Type: | Conference Paper |
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Publisher: | IEEE |
Additional Information: | Copyright 2005 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE. |
Keywords: | Assertions;Debugging;Verification |
Department/Centre: | Division of Electrical Sciences > Computer Science & Automation |
Date Deposited: | 27 Dec 2011 09:21 |
Last Modified: | 27 Dec 2011 09:21 |
URI: | http://eprints.iisc.ac.in/id/eprint/42814 |
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