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Automatic verification of distributed logic specifications

Malla, R and Patnaik, LM (1994) Automatic verification of distributed logic specifications. In: Microprocessing & microprogramming, 40 (1). pp. 43-56.

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Official URL: http://dx.doi.org/10.1016/0165-6074(94)90005-1


Formal specification is vital to the development of distributed real-time systems as these systems are inherently complex and safety-critical. It is widely acknowledged that formal specification and automatic analysis of specifications can significantly increase system reliability. Although a number of specification techniques for real-time systems have been reported in the literature, most of these formalisms do not adequately address to the constraints that the aspects of 'distribution' and 'real-time' impose on specifications. Further, an automatic verification tool is necessary to reduce human errors in the reasoning process. In this regard, this paper is an attempt towards the development of a novel executable specification language for distributed real-time systems. First, we give a precise characterization of the syntax and semantics of DL. Subsequently, we discuss the problems of model checking, automatic verification of satisfiability of DL specifications, and testing conformance of event traces with DL specifications. Effective solutions to these problems are presented as extensions to the classical first-order tableau algorithm. The use of the proposed framework is illustrated by specifying a sample problem.

Item Type: Journal Article
Publication: Microprocessing & microprogramming
Publisher: Elsevier science
Additional Information: Copyright of this article belongs to Elsevier science.
Department/Centre: Division of Electrical Sciences > Electronic Systems Engineering (Formerly Centre for Electronic Design & Technology)
Date Deposited: 26 Mar 2011 04:53
Last Modified: 23 Oct 2018 14:45
URI: http://eprints.iisc.ac.in/id/eprint/36260

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