Elimination of common mode voltage and fifth and seventh harmonics in a multilevel inverter fed IM drive using 12-sided polygonal voltage spacephasor

Lakshminarayanan, Sanjay and Mondal, Gopal and Tekwani, PN and Gopakumar, K (2006) Elimination of common mode voltage and fifth and seventh harmonics in a multilevel inverter fed IM drive using 12-sided polygonal voltage spacephasor. In: IEEE International Conference on Power Electronic, Drives and Energy Systems,, Dec 12-15, 2006, New Delhi, India,, pp. 256-261.

PDF 04147881.pdf - Published Version Restricted to Registered users only Download (6MB) | Request a copy

Abstract

A multilevel inverter with 12-sided polygonal voltage space vector structure is proposed in this paper. The present scheme provides elimination of common mode voltage variation and 5(th) and 7(th) order harmonics in the entire operating range of the drive. The proposed multi level structure is achieved by cascading only the conventional two-level inverters with asymmetrical DC link voltages. The bandwidths problems associated with conventional hexagonal voltage space vector structure current controllers, due to the presence of 5(th) and 7(th) harmonics, in the over modulation region, is absent in the present 12-sided structure. So a linear voltage control up to 12-step operation is possible, from the present twelve sided scheme, with less current control complexity. An open-end winding structure is used for the induction motor drive.

Item Type:	Conference Paper
Publisher:	Institute of Electrical and Electronics Engineers
Additional Information:	Copyright 2006 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE.
Keywords:	common mode voltage elimination; multilevel inverters.
Department/Centre:	Division of Electrical Sciences > Electronic Systems Engineering (Formerly Centre for Electronic Design & Technology)
Date Deposited:	27 Aug 2010 05:08
Last Modified:	19 Sep 2010 06:12
URI:	http://eprints.iisc.ac.in/id/eprint/30481

Actions (login required)

View Item