Viveka, KR and Kawle, Abhilasha and Amrutur, Bharadwa (2007) Low power pipelined TCAM employing mismatch dependent power allocation technique. In: 20th International Conference on VLSI Design held jointly with the 6th International Conference on Embedded Systems, JAN 06-10, 2007, Bangalore.
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Abstract
This paper presents design of a Low power 256x72 bit TCAM in 0.13um CMOS technology. In contrast to conventional Match line (ML) sensing scheme in which equal power is consumed irrespective of match or mismatch, the ML scheme employed in this design allocates less power to match decisions involving a large number of mismatched bits. Typically, the probability of mismatch is high so this scheme results in significant CAM power reduction. We propose to use this technique along with pipelining of search operation in which the MLs are broken into several segments. Since most words fail to match in first segment, the search operation for subsequent segments is discontinued, resulting in further reduction in power consumption. The above architecture provides 70% power reduction while performing search in 3ns.
Item Type: | Conference Paper |
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Publisher: | IEEE |
Additional Information: | Copyright 2007 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE. |
Department/Centre: | Division of Electrical Sciences > Electronic Systems Engineering (Formerly Centre for Electronic Design & Technology) |
Date Deposited: | 29 Mar 2010 11:10 |
Last Modified: | 19 Sep 2010 05:57 |
URI: | http://eprints.iisc.ac.in/id/eprint/26298 |
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