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An Input Triggered Polymorphic ASIC for H.264 Decoding

Rao, Adarsha and Alle, Mythri and Sainath, V and Shaik, Reyaz and Chowhan, Rajashekhar and Sankaraiah, S and Mantha, Sravanthi and Nandy, SK and Narayan, Ranjani (2009) An Input Triggered Polymorphic ASIC for H.264 Decoding. In: 20th IEEE International Conference on Application-Specific Systems, Architectures and Processors, JUL 07-09, 2009, Boston, MA, USA, pp. 106-113.

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Official URL: http://www.computer.org/portal/web/csdl/doi/10.110...


This paper reports the design of an input-triggered polymorphic ASIC for H.264 baseline decoder. Hardware polymorphism is achieved by selectively reusing hardware resources at system and module level. Complete design is done using ESL design tools following a methodology that maintains consistency in testing and verification throughout the design flow. The proposed design can support frame sizes from QCIF to 1080p.

Item Type: Conference Paper
Series.: IEEE International Conference on Application-Specific Systems Architectures and Processors
Publisher: IEEE
Additional Information: Copyright 2009 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE.
Keywords: Polymorphic ASIC;H.264 decoding
Department/Centre: Division of Interdisciplinary Sciences > Supercomputer Education & Research Centre
Date Deposited: 03 Dec 2009 05:33
Last Modified: 19 Sep 2010 05:53
URI: http://eprints.iisc.ac.in/id/eprint/25071

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