A survey of checkpointing algorithms for parallel and distributed computers

Kalaiselvi, S and Rajaraman, V (2000) A survey of checkpointing algorithms for parallel and distributed computers. In: Sadhana, 25 (5). pp. 489-510.

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Abstract

Checkpoint is defined as a designated place in a program at which normal processing is interrupted specifically to preserve the status information necessary to allow resumption of processing at a later time. Checkpointing is the process of saving the status information. This paper surveys the algorithms which have been reported in the literature for checkpointing parallel=distributed systems. It has been observed that most of the algorithms published for checkpointing in message passing systems are based on the seminal article by Chandy and Lamport. A large number of articles have been published in this area by relaxing the assumptions made in this paper and by extending it to minimise the overheads of coordination and context saving. Checkpointing for shared memory systems primarily extend cache coherence protocols to maintain a consistent memory. All of them assume that the main memory is safe for storing the context. Recently algorithms have been published for distributed shared memory systems, which extend the cache coherence protocols used in shared memory systems. They however also include methods for storing the status of distributed memory in stable storage. Most of the algorithms assume that there is no knowledge about the programs being executed. It is however felt that in development of parallel programs the user has to do a fair amount of work in distributing tasks and this information can be effectively used to simplify checkpointing and rollback recovery

Item Type:	Journal Article
Publication:	Sadhana
Publisher:	Indian Academy of Sciences
Additional Information:	Copyright for this article belongs to Indian Academy of Sciences.
Keywords:	Checkpointing algorithms;parallel & distributed computing;shared memory systems;rollback recovery;fault-tolerant systems
Department/Centre:	Division of Interdisciplinary Sciences > Supercomputer Education & Research Centre
Date Deposited:	07 Sep 2004
Last Modified:	19 Sep 2010 04:16
URI:	http://eprints.iisc.ac.in/id/eprint/1955

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