Modeling of Channel Potential and Subthreshold Slope of Symmetric Double-Gate Transistor

Ray, Biswajit and Mahapatra, Santanu (2009) Modeling of Channel Potential and Subthreshold Slope of Symmetric Double-Gate Transistor. In: IEEE Transactions on Electron Devices, 56 (2). pp. 260-266.

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Abstract

A new physically based classical continuous potential distribution model, particularly considering the channel center, is proposed for a short-channel undoped body symmetrical double-gate transistor. It involves a novel technique for solving the 2-D nonlinear Poisson's equation in a rectangular coordinate system, which makes the model valid from weak to strong inversion regimes and from the channel center to the surface. We demonstrated, using the proposed model, that the channel potential versus gate voltage characteristics for the devices having equal channel lengths but different thicknesses pass through a single common point (termed ``crossover point''). Based on the potential model, a new compact model for the subthreshold swing is formulated. It is shown that for the devices having very high short-channel effects (SCE), the effective subthreshold slope factor is mainly dictated by the potential close to the channel center rather than the surface. SCEs and drain-induced barrier lowering are also assessed using the proposed model and validated against a professional numerical device simulator.

Item Type:	Journal Article
Publication:	IEEE Transactions on Electron Devices
Publisher:	IEEE
Additional Information:	Copyright of this article belongs to IEEE. 2009 IEEE. This material is posted here with permission of the IEEE. Such permission of the IEEE does not in any way imply IEEE endorsement of any of Raman Research Institute's's products or services. Internal or personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution must be obtained from the IEEE by writing to pubs-permissions@ieee.org. By choosing to view this document, you agree to all provisions of the copyright laws protecting it."
Keywords:	Compact model;device stimulator;double-gate (DG);Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET);Poisson's equation; short-channel effect (SCE);subthreshold slope.
Department/Centre:	Division of Electrical Sciences > Electronic Systems Engineering (Formerly Centre for Electronic Design & Technology)
Date Deposited:	30 Oct 2009 11:13
Last Modified:	19 Sep 2010 05:27
URI:	http://eprints.iisc.ac.in/id/eprint/19200

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