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Effective Parameterization of Architectural Registers for Register Allocation Algorithms

Srikant, YN and Ravindra, DV (2000) Effective Parameterization of Architectural Registers for Register Allocation Algorithms. In: ACM Sigplan Notices, 35 (06). pp. 37-46.

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Official URL: http://delivery.acm.org/10.1145/360000/352037/p37-...


Code Selection in translation has been effectively abstracted out in terms of tree rewriting or pattern matching based approaches. However, modelling register files in an architecture independent way is a problem which is bypassed in most available algorithms. Architectural parameterization is frequently just code selector generation while architectural registers and operand constraints are handled in a machine-specific way. To partially address this issue, we present an abstraction for register allocation and assignment in non-uniform register file architectures in terms of bipartite graph matching.

Item Type: Journal Article
Publication: ACM Sigplan Notices
Publisher: Association of Computing Machinery
Additional Information: Copyright of this article belongs to Association of Computing Machinery.
Department/Centre: Division of Electrical Sciences > Computer Science & Automation
Date Deposited: 02 Jun 2009 10:39
Last Modified: 02 Jun 2009 10:39
URI: http://eprints.iisc.ac.in/id/eprint/18454

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