Narayan, Ranjani and Rajaraman, V (1990) Performance analysis of a multiprocessor machine based on data flow principles. In: Microprocessing and Microprogramming, 30 (1-5). pp. 601-608.
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Abstract
The authors propose a model of a static data flow oriented multiprocessor system and study issues pertaining to the scheduling and communication delays with the aim of improving the efficiency of the system. They model the machine by traversing the states of processing elements during the execution of a program. They carry out performance analysis of the machine for a program P, represented by different data flow graphs. These graphs are obtained using a coalescing algorithm that keeps the loss of parallelism at a minimum. They evaluate the machine for different configurations by varying the number of processing elements and the speed of various components. The machine is modelled for three scheduling strategies, namely dynamic, static and quasi-dynamic. The authors provide details of the machine using static and quasi-dynamic scheduling strategies only.
Item Type: | Journal Article |
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Publication: | Microprocessing and Microprogramming |
Publisher: | Elsevier |
Additional Information: | Copyright of this article belongs to Elsevier. |
Department/Centre: | Division of Interdisciplinary Sciences > Supercomputer Education & Research Centre |
Date Deposited: | 18 Oct 2007 |
Last Modified: | 19 Sep 2010 04:38 |
URI: | http://eprints.iisc.ac.in/id/eprint/11448 |
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