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Madhu, Kavitha and Singla, Tarun and Nandy, S K and Narayan, Ranjani and Neumann, Francois and Baufreton, Philippe (2017) Work-in-Progress: REDEFINE (R)(TM) - A Case for WCET-friendly Hardware Accelerators for Real time Applications. In: International Conference on Compilers Architectures and Synthesis For Embedded Systems (CASES), OCT 15-20, 2017, Seoul, SOUTH KOREA.
Guillaumet, Tom and Feron, Eric and Baufreton, Philippe and Neumann, Francois and Madhu, Kavitha and Krishna, Madhava and Nandy, SK and Narayan, Ranjani and Haldar, Chandan (2017) Task Allocation of Safety-Critical Applications on Reconfigurable Multi-Core Architectures. In: 2017 IEEE/AIAA 36TH DIGITAL AVIONICS SYSTEMS CONFERENCE (DASC) , SEP 17-21, 2017, St Petersburg, FL.
Das, Saptarsi and Madhu, Kavitha and Krishna, Madhav and Sivanandan, Nalesh and Merchant, Farhad and Natarajan, Santhi and Biswas, Ipsita and Pulli, Adithya and Nandy, SK and Narayan, Ranjani (2014) A framework for post-silicon realization of arbitrary instruction extensions on reconfigurable data-paths. In: JOURNAL OF SYSTEMS ARCHITECTURE, 60 (7). pp. 592-614.
