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Shah, Nimish and Chaudhari, Paragkumar and Varghese, Kuruvilla (2018) Runtime Programmable and Memory Bandwidth Optimized FPGA-Based Coprocessor for Deep Convolutional Neural Network. In: IEEE TRANSACTIONS ON NEURAL NETWORKS AND LEARNING SYSTEMS, 29 (12). pp. 5922-5934.

This list was generated on Sun Jan 29 18:44:13 2023 IST.