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Amrutur, Bharadwaj and Das, Pratap Kumar and Vasudevamurthy, Rajath (2011) 0.84 ps Resolution Clock Skew Measurement via Subsampling. In: IEEE Transactions on Very Large Scale Integration Systems, 19 (12). pp. 2267-2275.
Jeyasingh, Rakesh Gnana David and Bhat, Navakanta and Amrutur, Bharadwaj (2011) Adaptive Keeper Design for Dynamic Logic Circuits Using Rate Sensing Technique. In: IEEE Transactions on Very Large Scale Integration Systems, 19 (2). pp. 295-304.
Ghosh, D and Nandy, SK (1995) Design and realization of high-performance wave-pipelined 8×8 b multiplier in CMOS technology. In: IEEE Transactions on Very Large Scale Integration Systems, 3 (1). pp. 36-48.
