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Jana, B and Nath, PK (2022) A Single-Chip Solution for Diagnosing Peripheral Arterial Disease. In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 30 (5). pp. 671-675.
Raja, I and Banerjee, G (2020) A 0.75-2.5-ghz all-digital rf transmitter with integrated class-e power amplifier for spectrum sharing applications in 5g radios. In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 28 (10). pp. 2109-2121.
Mehta, Nandish and Amrutur, Bharadwaj (2011) Dynamic Supply and Threshold Voltage Scaling for CMOS Digital Circuits Using In-Situ Power Monitor. In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems, PP (99). pp. 1-10.
Majhi, Ananta K and Agrawal, Vishwani D and Jacob, James and Patnaik, Lalit M (2000) Line coverage of path delay faults. In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 8 (5). pp. 610-614.
Raman, Srilata and Patnaik, LM (1996) Performance-Driven MCM Partitioning Through an Adaptive Genetic Algorithm. In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 04 (04). pp. 434-444.
Somasekhar, Dinesh and Visvanathan, V (1993) A 230-MHz Half-Bit Level Pipelined Multiplier Using True Single-Phase Clocking. In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 1 (4). pp. 415-422.
