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Number of items: 4.

Mehta, Nandish and Amrutur, Bharadwaj (2011) Dynamic Supply and Threshold Voltage Scaling for CMOS Digital Circuits Using In-Situ Power Monitor. In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems, PP (99). pp. 1-10.

Majhi, Ananta K and Agrawal, Vishwani D and Jacob, James and Patnaik, Lalit M (2000) Line coverage of path delay faults. In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 8 (5). pp. 610-614.

Raman, Srilata and Patnaik, LM (1996) Performance-Driven MCM Partitioning Through an Adaptive Genetic Algorithm. In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 04 (04). pp. 434-444.

Somasekhar, Dinesh and Visvanathan, V (1993) A 230-MHz Half-Bit Level Pipelined Multiplier Using True Single-Phase Clocking. In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 1 (4). pp. 415-422.

This list was generated on Sun Apr 11 12:32:43 2021 IST.