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Number of items: 40.

Ratanaworabhan, Paruj and Burtscher, Martin and Kirovski, Darko and Zorn, Benjamin and Nagpal, Rahul and Pattabiraman, Karthik (2012) Efficient Runtime Detection and Toleration of Asymmetric Races. In: IEEE Transactions on Computers, 61 (4). pp. 548-562.

Rajan, Kaushik and Govindarajan, Ramaswamy (2009) A Novel Cache Architecture and Placement Framework for Packet Forwarding Engines. In: IEEE Transactions on Computers, 58 (8). pp. 1009-1025.

Naidu, Srinath R and Chandru, Vijay (2003) On synthesis of easily testable (k, K) circuits. In: IEEE Transactions on Computers, 52 (11). pp. 1490-1494.

Govindarajan, R and Yang, Hongbo and Amaral, JN and Zhang, Chihong and Gao, Guang R (2003) Minimum Register Instruction Sequencing to Reduce Register Spills in Out-of-Order Issue Superscalar Architectures. In: IEEE Transactions on Computers, 52 (1). pp. 4-20.

Baruah, Sanjoy K and Haritsa, Jayant R (1997) Scheduling for Overload in Real-Time Systems. In: IEEE Transactions on Computers, 46 (9). pp. 1034-1039.

Srinivas, Sampalli and Biswas, NN (1992) Design and Analysis of a Generalized Architecture for Reconfigurable m-ary Tree Structures. In: IEEE Transactions on Computers, 41 (11). pp. 1465-1478.

Mathias, PC and Patnaik, LM (1990) Systolic Evaluation of Polynomial Expressions. In: IEEE Transactions on Computers, 39 (5). pp. 653-665.

Jacob, James and Biswas, NN (1990) Further comments on "Detection of Faults in Programmable Logic Arrays". In: IEEE Transactions on Computers, 39 (1). pp. 155-157.

Srikant, YN (1990) Parallel Parsing of Arithmetic Expressions. In: IEEE Transactions on Computers, 39 (1). pp. 130-132.

Bonomi, F and Kumar, A (1990) Adaptive optimal load balancing in a nonhomogeneous multiserver system with a central job scheduler. In: IEEE Transactions on Computers, 39 (10). pp. 1232-1250.

Kumar, Anurag (1989) Adaptive load control of the central processor in a distributed system with a star topology. In: IEEE Transactions on Computers, 38 (11). pp. 1502-1512.

Ramanatha, KS and Biswas, NN (1988) Design of crosspoint-irredundant PLAs using minimal number of control inputs. In: IEEE Transactions on Computers, 37 (9). pp. 1130-1134.

Patnaik, LM and Govindarajan, R and Ramadoss, NS (1986) Design and Performance Evaluation of EXMAN: An EXtended MANchester Data Flow Computer. In: IEEE Transactions on Computers, 35 (3). pp. 229-244.

Biswas, NN (1985) On Bit Steering in the Minimization of the Control Memory of Microprogrammed Processors. In: IEEE Transactions on Computers, 34 (11). 1057 -1061.

Pedar, A and Sarma, VVS (1983) Architecture Optimization of Aerospace Computing Systems. In: IEEE Transactions on Computers, 32 (10). pp. 911-922.

Ramanatha, KS and Biswas, NN (1983) A Design for Testability of Undetectable Crosspoint Faults in Programmable Logic Arrays. In: IEEE Transactions on Computers, c32 (6). pp. 551-557.

Ramanatha, KS and Biswas, NN (1983) An On-Line Algorithm for the Location of Cross Point Faults in Programmable Logic Arrays. In: IEEE Transactions on Computers, 32 (5). 438 - 444.

Ramanatha, KS and Biswas, NN (1983) An on-line algorithm for the location of cross point faults in programmable logic arrays. In: IEEE Transactions on Computers, C-32 (5). pp. 438-444.

Krishnamurthy, EV (1983) On the Conversion of Hensel Codes to Farey Rationals. In: IEEE Transactions on Computers, 32 (4). pp. 331-337.

Krishnamurthy, EV and Murthy, VK (1983) Fast Iterative Division of p-adic Numbers. In: IEEE Transactions on Computers, 32 (4). pp. 396-398.

Mathialagan, Ayakannu and Biswas, NN (1981) Bit Steering In The Minimization Of Control Memory In Microprogrammed Digital-Computers. In: IEEE Transactions on Computers, 30 (2). pp. 144-147.

Mathialagan, A and Biswas, NN (1980) Optimal Interconnections in the Design of Microprocessors and Digital Systems. In: IEEE Transactions on Computers, C-29 (2). pp. 145-149.

Sethi, AS and Deo, N (1979) Interference in Multiprocessor Systems with Localized Memory Access Probabilities. In: IEEE Transactions on Computers, C28 (2). pp. 157-163.

Sarje, AK and Biswas, NN (1979) A New Approach to 2-Asummability Testing. In: IEEE Transactions on Computers, 28 (10). pp. 798-801.

Kodandapani, KL and Setlur, RV (1978) A Cellular Array for Multivalued Logic Functions. In: IEEE Transactions on Computers, 27 (11). pp. 1055-1059.

Joseph, J (1978) Easily Diagnosable Sequential Machines. In: IEEE Transactions on Computers, 27 (2). pp. 159-162.

Sarje, AK and Biswas, NN (1977) An Algorithm for Testing 2-Asummability of Boolean Functions. In: IEEE Transactions on Computers, C-26 (10). pp. 1049-1053.

Udupa, KJ and Murthy, ISN (1977) New Concepts for Three-Dimensional Shape Analysis. In: IEEE Transactions on Computers, C-26 (10). pp. 1043-1049.

Krishnamurthy, EV (1977) Matrix Processors Using p-adic Arithmetic for Exact Linear Computations. In: IEEE Transactions on Computers, C-26 (7). pp. 633-639.

Kodandapani, KL and Setlur, RV (1975) Reed-Muller Canonical Forms in Multivalued Logic. In: IEEE Transactions on Computers, C24 (6). 628 -636.

Rao, CVS and Biswas, NN (1975) Minimization of Incompletely Specified Sequential Machines. In: IEEE Transactions on Computers, 24 (11). pp. 1089-1100.

Chakrabarti, S (1974) Divide-and-Correct Algorithm for Division in a Negative Base. In: IEEE Transactions on Computers, C 23 (9). pp. 981-983.

Chakrabarti, S (1974) Divide-and-Correct Algorithm for Division in a Negative Base. In: IEEE Transactions on Computers, 23 (9). pp. 981-983.

Sen, SK and Krishnamurthy, EV (1974) Rank-Augmented LU-Algorithm for Computing Generalized Matrix Inverses. In: IEEE Transactions on Computers, c23 (2). pp. 199-201.

Kodandapani, KL (1974) A Note on Easily Testable Realizations for Logic Functions. In: IEEE Transactions on Computers, C23 (3). pp. 332-333.

Biswas, NN (1974) State Minimization of Incompletely Specified Sequential Machines. In: IEEE Transactions on Computers, C23 (1). pp. 80-84.

Biswas, * and Nripendra, N (1973) Comments on Identification of Totally Symmetric Boolean Functions. In: IEEE Transactions on Computers, 22 (9). 863 -864.

Sankar, PV and Chakrabarti, S and Krishnamurthy, EV (1973) Arithmetic Algorithms in a Negative Base. In: IEEE Transactions on Computers, 22 (2). pp. 120-125.

Sankar, PV and Chakrabarti, S and Krishnamurthy, EV (1973) Deterministic Division Algorithm in a Negative Base. In: IEEE Transactions on Computers, 22 (2). pp. 125-128.

Swamy, Sowmitri (1972) On Generalized Reed-Muller Expansions. In: IEEE Transactions on Computers, C-21 (9). pp. 1008-1009.

This list was generated on Wed Apr 14 10:50:00 2021 IST.