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Janakiraman, V and Bharadwaj, Amrutur and Visvanathan, V (2010) Voltage and Temperature Aware Statistical Leakage Analysis Framework Using Artificial Neural Networks. In: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 29 (7). pp. 1056-1069.
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Mandal, Pradip and Visvanathan, V (2001) CMOS Op-Amp Sizing Using a Geometric Programming Formulation. In: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 20 (1). pp. 22-38.
Srinivas, MK and Jacob, James and Agrawal, Vishwani D (1996) Functional Test Generation for Synchronous Sequential Circuits. In: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 15 (7). 831 -843.
Gurunath, B and Biswas, NN (1989) An Algorithm for Multiple Output Minimization. In: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 8 (9). pp. 1007-1013.
