On the Capacity of the Flash Memory Channel with Feedback

Rameshwar, VA and Reghu, AM and Kashyap, N (2020) On the Capacity of the Flash Memory Channel with Feedback. In: 16th International Symposium on Information Theory and its Applications, ISITA 2020, 24-27 Oct 2020, Kapolei; United States, pp. 11-15.

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Abstract

In this paper, the binary channel that changes the 101 input pattern to a 111 with probabilityϵ, and leaves the other input patterns unchanged, is considered as a model for inter-cell interference (ICI) in NAND flash memories. The capacity with feedback of this channel is cast as a dynamic programming (DP) problem, and is numerically evaluated using the value iteration procedure. An analytical upper bound on the feedback capacity is derived using the "Q-graph"-based technique of Sabag et al. 1, and the bound is shown to be numerically close in value to the feedback capacity arrived at from the DP problem. For the special case of the channel where ϵ is equal to 1 (which we call the deterministic flash memory channel), the capacities with and without feedback (which are identical) are shown to be roughly 0.8114, which, in turn, is the capacity of the constrained system that forbids the 101 input pattern. © 2020 IEICE.

Item Type:	Conference Paper
Publication:	Proceedings of 2020 International Symposium on Information Theory and its Applications, ISITA 2020
Publisher:	Institute of Electrical and Electronics Engineers Inc.
Additional Information:	The copyright for this article belongs to Institute of Electrical and Electronics Engineers Inc.
Keywords:	Dynamic programming; Information theory; Iterative methods, Binary channels; Constrained systems; Feedback capacity; Input patterns; Intercell interference; Memory channels; NAND flash memory; Value iteration, Flash memory
Department/Centre:	Division of Electrical Sciences > Electrical Communication Engineering
Date Deposited:	26 Mar 2021 06:54
Last Modified:	26 Mar 2021 06:54
URI:	http://eprints.iisc.ac.in/id/eprint/68611

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