FPGA Implementation of Real-Time Soldier Activity Detection based on Neural Network Classifier in Smart Military Suit

Gaikwad, NB and Keskar, AG and Tiwari, V and Shivaprakash, NC (2019) FPGA Implementation of Real-Time Soldier Activity Detection based on Neural Network Classifier in Smart Military Suit. In: 2019 IEEE Bombay Section Signature Conference, IBSSC 2019, 26 July 2019 - 28 July 2019, Victor Menezes Convention Centre (VMCC), IIT BombayMumbai.

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Abstract

The wearable technology carries sufficient potential to incorporate smartness into working of the military workforces like the Military Control Unit, Medical Responders, Backup Unit and War Strategist. The proposed work focuses on real-time soldier activity detection, which is essential for the operation of the smart military suit. The customized Artificial Neural Network (ANN) IP core is developed for the soldier activity classification, which is an integral component of suit gateway design. The multilayer perceptron (7-5-4) classification algorithm is implemented on the low-cost (99) FPGA evaluation platform by using Xilinx vivado and system generator development tools. The training (70) and testing (30) of this ANN design is performed on the UCI human activity dataset. The LabVIEW GUI and IP test design completed the hardware testing of this IP. The presented ANN IP is able to achieve 98.5 classification accuracy by utilizing minimal FPGA (Artix-7 xc7a35t) resources. The implemented ANN design requires only 285 nanoseconds for a classification and consumes 103 milliwatts of dynamic power. The system's accuracy at different development levels is also studied in this work.

Item Type:	Conference Paper
Publication:	2019 IEEE Bombay Section Signature Conference, IBSSC 2019
Publisher:	Institute of Electrical and Electronics Engineers Inc.
Additional Information:	cited By 0; Conference of 2019 IEEE Bombay Section Signature Conference, IBSSC 2019 ; Conference Date: 26 July 2019 Through 28 July 2019; Conference Code:157291
Keywords:	Field programmable gate arrays (FPGA); Gateways (computer networks); Internet protocols; Neural networks; Statistical tests; Wearable technology, Activity classifications; Activity detection; Classification accuracy; Classification algorithm; Evaluation platforms; FPGA implementations; Integral components; Neural network classifier, Integrated circuit design
Department/Centre:	Division of Physical & Mathematical Sciences > Instrumentation Appiled Physics
Date Deposited:	26 Jun 2020 11:15
Last Modified:	26 Jun 2020 11:15
URI:	http://eprints.iisc.ac.in/id/eprint/65542

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