ePrints@IIScePrints@IISc Home | About | Browse | Latest Additions | Advanced Search | Contact | Help

Parallel Flow-Sensitive Pointer Analysis by Graph-Rewriting

Nagaraj, Vaivaswatha and Govindarajan, R (2013) Parallel Flow-Sensitive Pointer Analysis by Graph-Rewriting. In: 22nd International Conference on Parallel Architectures and Compilation Techniques (PACT), SEP 07-11, 2013, Edinburgh, SCOTLAND, pp. 19-28.

[img] PDF
int_con_par_arc_aom_tec_19_2013.pdf - Published Version
Restricted to Registered users only

Download (2MB) | Request a copy
Official URL: http://dl.acm.org/citation.cfm?id=2523728

Abstract

Precise pointer analysis is a problem of interest to both the compiler and the program verification community. Flow-sensitivity is an important dimension of pointer analysis that affects the precision of the final result computed. Scaling flow-sensitive pointer analysis to millions of lines of code is a major challenge. Recently, staged flow-sensitive pointer analysis has been proposed, which exploits a sparse representation of program code created by staged analysis. In this paper we formulate the staged flow-sensitive pointer analysis as a graph-rewriting problem. Graph-rewriting has already been used for flow-insensitive analysis. However, formulating flow-sensitive pointer analysis as a graph-rewriting problem adds additional challenges due to the nature of flow-sensitivity. We implement our parallel algorithm using Intel Threading Building Blocks and demonstrate considerable scaling (upto 2.6x) for 8 threads on a set of 10 benchmarks. Compared to the sequential implementation of staged flow-sensitive analysis, a single threaded execution of our implementation performs better in 8 of the benchmarks.

Item Type: Conference Proceedings
Series.: International Conference on Parallel Architectures and Compilation Techniques
Publisher: IEEE
Additional Information: Copyright for this article belongs to the IEEE, 345 E 47TH ST, NEW YORK, NY 10017 USA
Department/Centre: Division of Interdisciplinary Sciences > Supercomputer Education & Research Centre
Date Deposited: 19 Aug 2014 11:05
Last Modified: 19 Aug 2014 11:05
URI: http://eprints.iisc.ac.in/id/eprint/49608

Actions (login required)

View Item View Item