Das, Bishnu Prasad and Amrutur, Bharadwaj and Jamadagni, HS (2006) Critical path modeling for dynamic voltage scaling (DVS) in low power applications. In: VLSI Design and Test Symposium, June 2006.
Full text not available from this repository. (Request a copy)| Item Type: | Conference Paper |
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| Department/Centre: | Division of Electrical Sciences > Electrical Communication Engineering |
| Date Deposited: | 10 Nov 2011 04:53 |
| Last Modified: | 10 Nov 2011 04:53 |
| URI: | http://eprints.iisc.ac.in/id/eprint/42012 |
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