Vinay, NS and Larsson, Erik and Singh, Virendra (2009) Thermal Aware Test Methodology of 3-D Integrated SoC. In: Workshop on 3-D Integration: Architecture, Design and Test (in conjunction with DATE’09), Apr 2009.
Full text not available from this repository. (Request a copy)| Item Type: | Conference Paper |
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| Department/Centre: | Division of Interdisciplinary Sciences > Supercomputer Education & Research Centre |
| Date Deposited: | 16 Dec 2011 07:00 |
| Last Modified: | 16 Dec 2011 07:00 |
| URI: | http://eprints.iisc.ac.in/id/eprint/41247 |
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