A Design for Testability of Undetectable Crosspoint Faults in Programmable Logic Arrays

Ramanatha, KS and Biswas, NN (1983) A Design for Testability of Undetectable Crosspoint Faults in Programmable Logic Arrays. In: IEEE Transactions on Computers, c32 (6). pp. 551-557.

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Abstract

In this paper, the validity of'single fault assumption in deriving diagnostic test sets is examined with respect to crosspoint faults in programmable logic arrays (PLA's). The control input procedure developed here can be used to convert PLA's having undetectable crosspoint faults to crosspoint-irredundant PLA's for testing purposes. All crosspoints will be testable in crosspoint-irredundant PLA's. The control inputs are used as extra variables during testing. They are maintained at logic I during normal operation. A useful heuristic for obtaining a near-minimal number of control inputs is suggested. Expressions for calculating bounds on the number of control inputs have also been obtained.

Item Type:	Journal Article
Publication:	IEEE Transactions on Computers
Publisher:	IEEE
Additional Information:	Copyright 1983 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE.
Department/Centre:	Division of Electrical Sciences > Electrical Communication Engineering
Date Deposited:	03 Jul 2009 06:04
Last Modified:	19 Sep 2010 05:33
URI:	http://eprints.iisc.ac.in/id/eprint/20605

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