Performance of switch blocking on multithreaded architectures

Gopinath, K and Narasimhan, KMK and Lim, BH and Agarwal, A (1994) Performance of switch blocking on multithreaded architectures. In: of 23rd Annual International Conference on Parallel Processing, 15-19 Aug. 1994, Raleigh, NC, USA, pp. 275-284.

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Abstract

Block multithreaded architectures tolerate large memory and synchronization latencies by switching contexts on every remote-memory-access or on a failed synchronization request. The authors study the performance of a waiting mechanism called switch-blocking where waiting threads are disabled (but not unloaded) and signalled at the completion of the wait in comparison with switch-spinning where waiting threads poll and execute in a round-robin fashion. The authors present an implementation of switch-blocking on a simulator for Alewife (a block multithreaded machine) for both remote memory accesses and synchronization operations and discuss results from the simulator. The authors' results indicate that switch-blocking has the same problems that switch-spinning has under heavy lock contention and that support for switch-blocking for remote memory accesses may not be judicious at current range of memory access times but may be so in the future due to its strong interactions with synchronization operations

Item Type:	Conference Paper
Publisher:	CRC Press
Additional Information:	Copyright of this article belongs to CRC Press
Keywords:	Markov processes;multiprocessing systems;remote procedure calls;synchronisation
Department/Centre:	Division of Electrical Sciences > Computer Science & Automation
Date Deposited:	28 Sep 2007
Last Modified:	18 Feb 2011 10:35
URI:	http://eprints.iisc.ac.in/id/eprint/11025

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