# A Methodology for Generating Application Specific Tree Multipliers

Ramanathan, S and Mohanty, Nibedita and Visvanatha, V (1993) A Methodology for Generating Application Specific Tree Multipliers. In: Sixth International Conference on VLSI Design, 1993, 3-6 January, Bombay,India, 176 -179.

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Low latency, application, specific multipliers are required f o r many DSP algorithms. Tree multipliers are an obvious answer to this requirement. However, tree architectures have not been considered for automatic multiplier generation because they have been considered to be irregular. In this paper, a recursive methodology for generating $n \rightarrow2$ compressors (for n in the range $3\leq5$ n $5\leq64$) using the basic cells $3\rightarrow2$ and $4\rightarrow2$ is presented. This methodology results in a highly regular and modular layout that can be automatically generated. The performance of the resulting compressors is competitive with detailed full-custom design. The area and latency of the resulting layout for any n is predictable t o a fair degree of accuracy.