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Parallel Processing of a Multilayer Routing Package

Srinivas, MK and Radhakrishnan, T (1991) Parallel Processing of a Multilayer Routing Package. In: 1991 IEEE Region 10 International Conference on EC3-Energy, Computer, Communication and Control Systems.TENCON '91, 28-30 August, New Delhi,India, Vol.3, 51-55.


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With the increasing density of components on Printed Circuit Boards (PCBs) and the advancement of fabrication technologies for multiplayer PCBs, improvement of speed and techniques for the Computer Aided Design of multilayer PCBs has become a major area of research. The paper discusses the parallel processing of layering and routing algorithms for design of multilayer PCBs on a network of small computers with a moderately high speed communication medium. Multilayer PCB design consists in partitioning a netlist into as many layers as necessary, and routing one or two layers at time. The routing processes of the different netlists is entirely independent of each other.

Item Type: Conference Paper
Additional Information: Copyright 1990 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE.
Department/Centre: Division of Electrical Sciences
Depositing User: Kujur Pawan
Date Deposited: 24 May 2006
Last Modified: 19 Sep 2010 04:26
URI: http://eprints.iisc.ac.in/id/eprint/6807

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