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Test System for Thin Film Transistor Parameter Extraction in Active Matrix Backplanes

Daniel, Sanil and Nair, Aswathi and Sambandan, Sanjiv (2019) Test System for Thin Film Transistor Parameter Extraction in Active Matrix Backplanes. In: IEEE JOURNAL OF THE ELECTRON DEVICES SOCIETY, 7 (1). pp. 638-644.

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Official URL: https://dx.doi.org/10.1109/JEDS.2019.2922000


Thin film transistor (TFT) active matrix backplanes are used in large area electronic systems, such as displays and image sensors. With backplanes being fabricated on wearable and flexible substrates, the possibilities of operational faults in backplanes have increased. These faults could either be hard faults, such as line opens or shorts or could be softer faults, such as time dependent variations in the TFT transfer characteristics. Real time diagnosis of these faults require built-in-self-test systems. While many such systems have been demonstrated to diagnose hard faults, an easily realizable system to identify soft faults, such as variations in transistor transconductance remain an open challenge. In this paper, we discuss a system that extracts the transconductance by charging and then discharging the pixel capacitor at various gate voltages for an active matrix liquid crystal display backplane. This permits a plot of the time averaged current versus the gate voltage from which the spatial variation of transconductance can be extracted. The details of the design are discussed and a proof of concept with a 3 x 4 amorphous silicon backplane is demonstrated.

Item Type: Journal Article
Additional Information: copyright for this article belongs to IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Keywords: Thin film transistor; large area electronics; faults; testing; built-in-self-test
Department/Centre: Division of Physical & Mathematical Sciences > Instrumentation Appiled Physics
Depositing User: Id for Latest eprints
Date Deposited: 26 Aug 2019 09:38
Last Modified: 26 Aug 2019 09:38
URI: http://eprints.iisc.ac.in/id/eprint/63279

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