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Method to Model Input Voltage Ripple in Multi-Domain Fully Integrated Voltage Regulators

Govindan, Srinivasan and Gope, Dipanjan and Bharath, Krishna and Venkataraman, Srikrishnan (2018) Method to Model Input Voltage Ripple in Multi-Domain Fully Integrated Voltage Regulators. In: IEEE ELECTRICAL DESIGN OF ADVANCED PACKAGING AND SYSTEMS SYMPOSIUM (EDAPS 2018), DEC 16-18, 2018, Chandigarh, INDIA.

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Official URL: http://doi.org/10.1109/EDAPS.2018.8680865

Abstract

The on-chip power domains of the latest generation of high performance server microprocessors are generated using integrated switched mode dc-dc converters also known as Fully Integrated Voltage regulators (FIVR). The multi-domain FIVRs in the chip share a common input power supply and the input voltage ripple can be quite high when all of them switch together. The modeling of the input voltage ripple in multi-domain FIVRs using circuit simulation tools such as SPICE is a tedious task. This paper proposes a simple method to accurately model the steady state input voltage ripple using the Harmonic Domain (HD) method.

Item Type: Conference Proceedings
Additional Information: Copyright for this article belongs to IEEE
Keywords: Power Integrity/Power Distribution Networks (PDNs)/Ground Noise; IC and Package Level EMC; Computational Electromagnetics and Multi-physics Methods for SI/PI/TI Analysis
Department/Centre: Division of Electrical Sciences > Electrical Communication Engineering
Depositing User: LIS Interns
Date Deposited: 24 May 2019 09:24
Last Modified: 24 May 2019 09:24
URI: http://eprints.iisc.ac.in/id/eprint/62757

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