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Dielectric based charge carrier tuning for CNT CMOS inverters

Gangavarapu, Yasasvi PR and Sharma, Anjanashree Mankala Ramakrishna and Ganapathi, KL and Mohan, Sangeneni and Naik, AK (2019) Dielectric based charge carrier tuning for CNT CMOS inverters. In: SEMICONDUCTOR SCIENCE AND TECHNOLOGY, 34 (1).

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Official URL: https://doi.org/10.1088/1361-6641/aaf17d

Abstract

The realization of Carbon nanotube (CNT) based CMOS compatible complementary logic circuits is one of the bottlenecks that needs to be overcome in order to consider CNTs as an alternative to silicon in future CMOS technology. In this work, we demonstrate complementary logic inverters using solution-processed CNTs. The type of charge carriers in the CNT field effect transistors (FET) have been tuned by changing the dielectric environment to realize both p-type and n-type CNTFETs. We have fabricated p-type CNTFETs using electron beam evaporated HfO2 as the top-gate dielectric and n-type CNTFETs using plasma enhanced chemical vapor deposition grown Silicon nitride as the top-gate dielectric. Using this fabrication approach, we realize high performance p- and n-CNTFETs employing regular metals such as Palladium for the source/drain contacts instead of rare earth metal contacts such as scandium. We demonstrate complementary logic inverters with a DC gain as high as 6.7 and operating voltages within 1 V.

Item Type: Journal Article
Additional Information: Copyright of this article belongs to IOP PUBLISHING LTD
Keywords: carbon nanotube field effect transistor; logic inverter; CMOS; solution processed CNT
Department/Centre: Division of Interdisciplinary Research > Centre for Nano Science and Engineering
Depositing User: Francis Jayakanth
Date Deposited: 10 Feb 2019 08:59
Last Modified: 10 Feb 2019 08:59
URI: http://eprints.iisc.ac.in/id/eprint/61340

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