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Design and Analysis of the Low Device Stress Active Power Decoupling for Single-Phase Grid Connection for a Wide Range of Power Factor

Bhowmick, Sujata and Umanand, Loganathan (2018) Design and Analysis of the Low Device Stress Active Power Decoupling for Single-Phase Grid Connection for a Wide Range of Power Factor. In: IEEE JOURNAL OF EMERGING AND SELECTED TOPICS IN POWER ELECTRONICS, 6 (4). pp. 1921-1931.

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Official URL: http://dx.doi.org/10.1109/JESTPE.2018.2794784


Single-phase power converters suffer from the double frequency power pulsation. In voltage source inverters, the dc bus capacitor is designed to supply this double frequency current. The stringent dc bus voltage ripple specifications call for larger capacitance. This implies larger electrolytic capacitors. However, the electrolytic capacitor suffers from short-term life span, which consequently brings down the lifetime of the converter. As an alternative, active power decoupling (APD) ensures significant reduction in dc buffering requirement, thereby reducing the bus capacitance. This can make use of the film capacitors with better lifespan. In this paper, an APD scheme is designed and developed for the grid-connected system. Another important feature of the proposed scheme is that, it reduces the stress on the switches significantly while compared with existing APD solutions for all load power factors. The system is analyzed further to arrive at APD control conditions including the effect of grid filter inductance. The simulation and experimentation have been done to validate the proposed method. Additionally, the stress on the switches as a function of grid filter inductance is predicted theoretically and verified practically. The average stress on the switches is shown to be lesser than the existing solutions.

Item Type: Journal Article
Additional Information: Copy right for this article belong to IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Keywords: Active power decoupling (APD); double frequency power; grid connection; minimum stress
Department/Centre: Division of Electrical Sciences > Electronic Systems Engineering (Formerly Centre for Electronic Design & Technology)
Depositing User: Id for Latest eprints
Date Deposited: 19 Nov 2018 14:42
Last Modified: 19 Nov 2018 14:42
URI: http://eprints.iisc.ac.in/id/eprint/61097

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