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FinFET SCR: Design Challenges and Novel Fin SCR Approaches for On-Chip ESD Protection

Paul, Milova and Kumar, B Sampath and Russ, Christian and Gossner, Harald and Shrivastava, Mayank (2017) FinFET SCR: Design Challenges and Novel Fin SCR Approaches for On-Chip ESD Protection. In: 39th Electrical Overstress/Electrostatic Discharge Symposium (EOS/ESD), SEP 10-14, 2017, Tucson, AZ.

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Official URL: http://dx.doi.org/10.23919/EOSESD.2017.8073437

Abstract

For the first time, physical insights into the missing SCR action in planar equivalent Fin SCR devices with the help of TCAD are presented, which has leveraged exploring challenges and fundamental roadblock in designing Fin SCRs. Key role of contact silicidation in Fin technology is discovered. The new understanding has allowed engineering conventional designs to resume SCR action. Finally, a novel Fin SCR design is disclosed, which offers an area efficient current conduction beside device scalability.

Item Type: Conference Proceedings
Additional Information: Copy right for the article belong toIEEE, 345 E 47TH ST, NEW YORK, NY 10017 USA
Department/Centre: Division of Electrical Sciences > Electronic Systems Engineering (Formerly Centre for Electronic Design & Technology)
Depositing User: Id for Latest eprints
Date Deposited: 04 Apr 2018 18:51
Last Modified: 04 Apr 2018 18:51
URI: http://eprints.iisc.ac.in/id/eprint/59475

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