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Part I: On the Unification of Physics of Quasi-Saturation in LDMOS Devices

Kumar, B Sampath and Shrivastava, Mayank (2018) Part I: On the Unification of Physics of Quasi-Saturation in LDMOS Devices. In: IEEE TRANSACTIONS ON ELECTRON DEVICES, 65 (1). pp. 191-198.

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Official URL: http://dx.doi.org/10.1109/TED.2017.2777004

Abstract

There have been a lot of ambiguities related to physics of quasi-saturation (QS) in laterally diffused MOS (LDMOS) devices in the published literature. For example, models that explain QS in input characteristics do not explain the same in output characteristics and vice versa. In addition to this, none of the earlier models explain early onset of QS at higher temperatures nor the models were validated using counter arguments. Attributed to this, a need for unified theory explaining physics of QS is justified in this paper. Furthermore, this paper for the first time, while addressing missing links between the observations reported in the past, develops a unified theory to explain physics of QS behavior. The theory presented here is independent of device architecture and covers all voltage-current-temperature trends. While considering velocity saturation and space charge modulation, we have discovered key role of high field mobility degradation of majority carriers and electric field screening, which is found to be the root cause of QS in LDMOS devices. The theory presented is further validated with numerous counter arguments. Finally, based on the new physical insight developed, we have proposed different approaches to mitigate QS effect. A detailed device design guideline to mitigate QS and its correlation with analog/RF performance, electo static discharge, hot-carrier reliability, self-heating, and safe operating area concern is presented in Part II of this paper.

Item Type: Journal Article
Publication: IEEE TRANSACTIONS ON ELECTRON DEVICES
Publisher: 10.1109/TED.2017.2777004
Additional Information: Copy right for this article belongs to the IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC, 445 HOES LANE, PISCATAWAY, NJ 08855-4141 USA
Department/Centre: Division of Electrical Sciences > Electronic Systems Engineering (Formerly Centre for Electronic Design & Technology)
Date Deposited: 20 Jan 2018 06:39
Last Modified: 20 Jan 2018 06:39
URI: http://eprints.iisc.ac.in/id/eprint/58811

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