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Interface traps at Al2O3/InAlN/GaN MOS-HEMT -on-200 mm Si

Kumar, Sandeep and Remesh, Nayana and Dolmanan, S B and Tripathy, S and Raghavan, S and Muralidharan, R and Nath, Digbijoy N (2017) Interface traps at Al2O3/InAlN/GaN MOS-HEMT -on-200 mm Si. In: SOLID-STATE ELECTRONICS, 137 . pp. 117-122.

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Official URL: http://doi.org/10.1016/j.sse.2017.09.002

Abstract

We report on the characterization of the interfaces of Al2O3/InAlN/GaN HEMT structure grown on 200 mm diameter silicon using conductance dispersion technique. Irreversible threshold voltage (VTH) shift of up to +similar to 2.5 V was observed due to the gate stress induced activation of acceptor states. Further, frequency dependent VTH shift during capacitance voltage measurements were also recorded due to the presence of slow traps at InAlN/GaN interface. The conductance dispersion indicated the presence of acceptor traps of the order of similar to 4 x 10(12) to 7 x 10(13) cm(-2) eV(-1) with a time constant of similar to 10 to 350 ls at the InAlN/GaN interface. Trap density at the Al2O3/InAlN was found to be in similar range but with a time constant of similar to 2 ms. The presence of high density of traps at InAlN/GaN interface is attributed to the unavoidable growth interruption before the start of InAlN growth. (C) 2017 Elsevier Ltd. All rights reserved.

Item Type: Journal Article
Publication: SOLID-STATE ELECTRONICS
Additional Information: Copy right for this article belongs to the PERGAMON-ELSEVIER SCIENCE LTD, THE BOULEVARD, LANGFORD LANE, KIDLINGTON, OXFORD OX5 1GB, ENGLAND
Department/Centre: Division of Interdisciplinary Sciences > Centre for Nano Science and Engineering
Date Deposited: 01 Dec 2017 06:48
Last Modified: 01 Dec 2017 06:48
URI: http://eprints.iisc.ac.in/id/eprint/58355

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