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Multi-k-ic Depth Three Circuit Lower Bound

Kayal, Neeraj and Saha, Chandan (2017) Multi-k-ic Depth Three Circuit Lower Bound. In: THEORY OF COMPUTING SYSTEMS, 61 (4, SI). pp. 1237-1251.

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Official URL: http://doi.org/10.1007/s00224-016-9742-9

Abstract

In a multi-k-ic depth three circuit every variable appears in at most k of the linear polynomials in every product gate of the circuit. This model is a natural generalization of multilinear depth three circuits that allows the formal degree of the circuit to exceed the number of underlying variables (as the formal degree of a multi-k-ic depth three circuit can be kn where n is the number of variables). The problem of proving lower bounds for depth three circuits with high formal degree has gained in importance following a work by Gupta et al. (2013) on depth reduction to high formal degree depth three circuits. In this work, we show an exponential lower bound for multi-k-ic depth three circuits for any arbitrary constant k.

Item Type: Journal Article
Publication: THEORY OF COMPUTING SYSTEMS
Additional Information: Copy right for this article belongs to the SPRINGER, 233 SPRING ST, NEW YORK, NY 10013 USA
Department/Centre: Division of Electrical Sciences > Computer Science & Automation
Date Deposited: 03 Nov 2017 10:55
Last Modified: 03 Nov 2017 10:55
URI: http://eprints.iisc.ac.in/id/eprint/58144

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