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Elimination of Dead-Time Transients in a Three-Level Flying Capacitor Inverter Using a State Machine for Switching State Sequence Selection

Kshirsagar, Abhijit and Kaarthik, R Sudharshan and Boby, Mathews and Umanand, L and Gopakumar, K (2017) Elimination of Dead-Time Transients in a Three-Level Flying Capacitor Inverter Using a State Machine for Switching State Sequence Selection. In: 2016 IEEE INTERNATIONAL CONFERENCE ON POWER ELECTRONICS, DRIVES AND ENERGY SYSTEMS (PEDES) , DEC 14-17, 2016, Trivandrum, INDIA.

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Official URL: http://doi.org/10.1109/PEDES.2016.7914554

Abstract

In a three-level flying capacitor inverter, certain switching state sequences can cause an undesirable transient in the pole voltage. The transients constitute and error voltage which degrades harmonic performance, distorts the current and generates electromagnetic noise. This paper presents a scheme to completely eliminate these dead-time transients using a digital state machine to determine the switching state to be applied in the subsequent switching period based on the present switching state. The modified switching state does not change the effective phase voltage, and the floating capacitors are kept well balanced. The proposed scheme works independent of the modulation or control scheme in use. The scheme was first tested in simulation, followed by deployment on an FPGA for hardware validation and timing analysis.

Item Type: Conference Proceedings
Additional Information: Copy right for this article belongs to the IEEE International Conference on Power Electronics, Drives and Energy Systems (PEDES), Trivandrum, INDIA, DEC 14-17, 2016
Department/Centre: Division of Electrical Sciences > Electronic Systems Engineering (Formerly Centre for Electronic Design & Technology)
Depositing User: Id for Latest eprints
Date Deposited: 23 Sep 2017 04:56
Last Modified: 23 Sep 2017 04:56
URI: http://eprints.iisc.ac.in/id/eprint/57894

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