Dynamic Vectorization: A Mechanism for Exploiting Far-Flung ILP in Ordinary Programs

Vajapeyam, Sriram and Joseph, PJ and Mitra, Tulika (1999) Dynamic Vectorization: A Mechanism for Exploiting Far-Flung ILP in Ordinary Programs. In: 26th International Symposium on Computer Architecture, 1999, 2-4 May, Atlanta,Georgia, 16 -27.

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Abstract

Several ILP limit studies indicate the presence of considerable ILP across dynamically far-apart instructions in program execution. This paper proposes a hardware mechanism, dynamic vectorization (DV), as a tool for quickly building up a large logical instruction window. Dynamic vectorization converts repetitive dynamic instruction sequences into vector form, enabling the processing of instructions from beyond the corresponding program loop to be overlapped with the loop. This enables vector-like execution of programs with relatively complex static control flow that may not be amenable to static, compile time vectorization. Experimental evaluation shows that a large fraction of the dynamic instructions of four of the six SPECInt92 programs can be captured in vector form. Three of these programs exhibit significant potential for ILP improvements from dynamic vectorization, with speedups of more than a factor of 2 in a scenario of realistic branch prediction and perfect memory disambiguation. Under perfect branch prediction conditions, a fourth program also shows well over a factor of 2 speedup from DV. The speedups are due to the overlap of post-loop processing with loop processing.

Item Type:	Conference Paper
Publisher:	IEEE
Additional Information:	Copyright 1990 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE.
Department/Centre:	Division of Interdisciplinary Sciences > Supercomputer Education & Research Centre Division of Electrical Sciences > Computer Science & Automation
Date Deposited:	06 Mar 2006
Last Modified:	19 Sep 2010 04:24
URI:	http://eprints.iisc.ac.in/id/eprint/5780

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