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Analysis and Modelling of Non-idealities in High Frequency Class D Amplifier

Saha, Aalok Dyuti and John, Vinod (2016) Analysis and Modelling of Non-idealities in High Frequency Class D Amplifier. In: 3rd International Conference on Electrical Energy Systems (ICEES), MAR 17-19, 2016, Chennai, INDIA, pp. 44-49.

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Official URL: http://dx.doi.org/10.1109/ICEES.2016.7510613

Abstract

The effect of non-idealities of a high frequency class D amplifier on it's output voltage is analysed. Firstly individual non-idealities like dead time, MOSFET body-diode drop, MOSFET ON-State drop, finite turn-on and turn-off time, series resistance of inductor and capacitor of output stage filter are taken one at a time and their effect on output voltage is analysed. Then effect of all of these non-idealities and their inter-dependencies are analysed for all load conditions. A mathematical model considering the non-idealities to calculate the output voltage is derived. Also, a simple circuit model for an approximate analysis of practical class D amplifier with all non-idealities is derived. The error in the output voltage of the H-bridge for a sinusoidal input signal is numerically simulated. The model is then verified by simulation and hardware based experiments. A closed loop class D amplifier is developed which reduces the output voltage error by 78%.

Item Type: Conference Proceedings
Additional Information: Copy right for this article belongs to the IEEE, 345 E 47TH ST, NEW YORK, NY 10017 USA
Department/Centre: Division of Electrical Sciences > Electrical Engineering
Depositing User: Id for Latest eprints
Date Deposited: 20 Jan 2017 04:24
Last Modified: 20 Jan 2017 04:24
URI: http://eprints.iisc.ac.in/id/eprint/55930

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