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All Inorganic Spin-Coated Nanoparticle-Based Capacitive Memory Devices

Mondal, Sandip and Venkataraman, V (2016) All Inorganic Spin-Coated Nanoparticle-Based Capacitive Memory Devices. In: IEEE ELECTRON DEVICE LETTERS, 37 (4). pp. 396-399.

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Official URL: http://dx.doi.org/10.1109/LED.2016.2527689

Abstract

We demonstrate all inorganic, robust, cost-effective, spin-coated, two-terminal capacitive memory metal-oxide nanoparticle-oxide-semiconductor devices with cadmium telluride nanoparticles sandwiched between aluminum oxide phosphate layers to form the dielectric memory stack. Using a novel high-speed circuit to decouple reading and writing, experimentally measured memory windows, programming voltages, retention times, and endurance are comparable with or better than the two-terminal memory devices realized using other fabrication techniques.

Item Type: Journal Article
Publication: IEEE ELECTRON DEVICE LETTERS
Publisher: IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Additional Information: Copy right for this article belongs to the IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC, 445 HOES LANE, PISCATAWAY, NJ 08855-4141 USA
Keywords: Aluminum oxide phosphate (ALPO); cadmium telluride nanoparticle (CdTe-NP); floating gate memory; metal oxide nanoparticle oxide semiconductor devices (m-MONOS); high speed capacitance-voltage (HSCV)
Department/Centre: Division of Physical & Mathematical Sciences > Physics
Date Deposited: 28 Apr 2016 06:04
Last Modified: 28 Apr 2016 06:04
URI: http://eprints.iisc.ac.in/id/eprint/53711

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