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A Harmonic Suppression Scheme for Open-End Winding Split-Phase IM Drive Using Capacitive Filters for the Full Speed Range

Azeez, Najath Abdul and Gopakumar, K and Mathew, Jaison and Cecati, Carlo (2014) A Harmonic Suppression Scheme for Open-End Winding Split-Phase IM Drive Using Capacitive Filters for the Full Speed Range. In: IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, 61 (10). pp. 5213-5221.

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Official URL: http://dx.doi.org/10.1109/TIE.2014.2302388

Abstract

Voltage source inverter (VSI)-fed six-phase induction motor (IM) drives have high 6n +/- 1, n = odd-order harmonic currents. This is because these currents, driven by the corresponding harmonic voltages in the inverter output, are limited only by the stator leakage impedance, as these harmonics are absent in the back electromotive force of the motor. To suppress the harmonic currents, either bulky inductive harmonic filters or complex pulsewidth modulation (PWM) techniques have to be used. This paper proposes a harmonic elimination scheme using switched capacitor filters for a VSI-fed split-phase IM drive. Two 3-phase inverters fed from capacitors are used on the open-end side of the motor to suppress 6n +/- 1, n = odd-order harmonics. A PWM scheme that can suppress the harmonics as well as balance the capacitor voltage is also proposed. The capacitor fed inverters are switched so that the fundamental voltage is not affected, and the fundamental power is always drawn from the main inverters. The proposed scheme is verified with a detailed experimental study. The effectiveness of the scheme is demonstrated by comparing the results with those obtained by disabling the capacitor fed inverters.

Item Type: Journal Article
Additional Information: Copyright for this article belongs to the IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC, 445 HOES LANE, PISCATAWAY, NJ 08855-4141 USA
Keywords: Harmonic suppression; induction motor (IM) drives; split-phase motor
Department/Centre: Division of Electrical Sciences > Electronic Systems Engineering (Formerly Centre for Electronic Design & Technology)
Depositing User: Id for Latest eprints
Date Deposited: 24 Jun 2014 05:10
Last Modified: 24 Jun 2014 05:10
URI: http://eprints.iisc.ac.in/id/eprint/49288

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