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A power-scalable RF CMOS receiver for 2.4 GHz Wireless Sensor Network applications

Ghosal, Kaushik and Anand, Tejasvi and Chaturvedi, Vikram and Amrutur, Bharadwaj (2012) A power-scalable RF CMOS receiver for 2.4 GHz Wireless Sensor Network applications. In: 2012 19th IEEE International Conference on Electronics, Circuits and Systems (ICECS), 9-12 Dec. 2012, Seville.

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Official URL: http://dx.doi.org/

Abstract

A power scalable receiver architecture is presented for low data rate Wireless Sensor Network (WSN) applications in 130nm RF-CMOS technology. Power scalable receiver is motivated by the ability to leverage lower run-time performance requirement to save power. The proposed receiver is able to switch power settings based on available signal and interference levels while maintaining requisite BER. The Low-IF receiver consists of Variable Noise and Linearity LNA, IQ Mixers, VGA, Variable Order Complex Bandpass Filter and Variable Gain and Bandwidth Amplifier (VGBWA) capable of driving variable sampling rate ADC. Various blocks have independent power scaling controls depending on their noise, gain and interference rejection (IR) requirements. The receiver is designed for constant envelope QPSK-type modulation with 2.4GHz RF input, 3MHz IF and 2MHz bandwidth. The chip operates at 1V Vdd with current scalable from 4.5mA to 1.3mA and chip area of 0.65mm2.

Item Type: Conference Paper
Additional Information: Copyright of the this article belongs to IEEE.
Keywords: Power Scalable; Low Power Receiver; Wireless Sensor Networks; 2.4GHz Receiver
Department/Centre: Division of Electrical Sciences > Electrical Communication Engineering
Depositing User: Francis Jayakanth
Date Deposited: 02 Dec 2013 10:46
Last Modified: 02 Dec 2013 10:46
URI: http://eprints.iisc.ac.in/id/eprint/47915

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