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Reconciling transactional conflicts with compiler's help

Mannarswamy, Sandya S and Govindarjan, R (2012) Reconciling transactional conflicts with compiler's help. In: CGO '12 Proceedings of the Tenth International Symposium on Code Generation and Optimization, 2012, New York, NY, USA.

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Official URL: http://dx.doi.org/10.1145/2259016.2259024

Abstract

Software transactional memory(STM) is a promising programming paradigm for shared memory multithreaded programs. While STM offers the promise of being less error-prone and more programmer friendly compared to traditional lock-based synchronization, it also needs to be competitive in performance in order for it to be adopted in mainstream software. A major source of performance overheads in STM is transactional aborts. Conflict resolution and aborting a transaction typically happens at the transaction level which has the advantage that it is automatic and application agnostic. However it has a substantial disadvantage in that STM declares the entire transaction as conflicting and hence aborts it and re-executes it fully, instead of partially re-executing only those part(s) of the transaction, which have been affected due to the conflict. This "Re-execute Everything" approach has a significant adverse impact on STM performance. In order to mitigate the abort overheads, we propose a compiler aided Selective Reconciliation STM (SR-STM) scheme, wherein certain transactional conflicts can be reconciled by performing partial re-execution of the transaction. Ours is a selective hybrid approach which uses compiler analysis to identify those data accesses which are legal and profitable candidates for reconciliation and applies partial re-execution only to these candidates selectively while other conflicting data accesses are handled by the default STM approach of abort and full re-execution. We describe the compiler analysis and code transformations required for supporting selective reconciliation. We find that SR-STM is effective in reducing the transactional abort overheads by improving the performance for a set of five STAMP benchmarks by 12.58% on an average and up to 22.34%.

Item Type: Conference Paper
Additional Information: Copyright of this article belongs to Association for Computing Machinery.
Keywords: Compiler; Software Transactional Memory; Conflicts
Department/Centre: Division of Electrical Sciences > Computer Science & Automation
Depositing User: Francis Jayakanth
Date Deposited: 27 Nov 2013 07:52
Last Modified: 27 Nov 2013 07:52
URI: http://eprints.iisc.ac.in/id/eprint/47826

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