ePrints@IIScePrints@IISc Home | About | Browse | Latest Additions | Advanced Search | Contact | Help

Graphene transistors for CMOS applications: opportunities and challenges

Majumdar, Kausik and Kallat, Sangeeth and Bhat, Navakanta (2011) Graphene transistors for CMOS applications: opportunities and challenges. In: International Workshop on Physics of Semiconductor Devices, 19-22 December, 2011., IIT, Kanpur, India.

Full text not available from this repository. (Request a copy)
Official URL: http://dx.doi.org/10.1109/ISDRS.2011.6135155

Abstract

In the last decade, there has been a tremendous interest in Graphene transistors. The greatest advantage for CMOS nanoelectronics applications is the fact that Graphene is compatible with planar CMOS technology and potentially offers excellent short channel properties. Because of the zero bandgap, it will not be possible to turn off the MOSFET efficiently and hence the typical on current to off current ratio (Ion/Ioff) has been less than 10. Several techniques have been proposed to open the bandgap in Graphene. It has been demonstrated, both theoretically and experimentally, that Graphene Nanoribbons (GNR) show a bandgap which is inversely proportional to their width. GNRs with about 20 nm width have bandgaps in the range of 100meV. But it is very difficult to obtain GNRs with well defined edges. An alternate technique to open the band gap is to use bilayer Graphene (BLG), with an asymmetric bias applied in the direction perpendicular to their plane. Another important CMOS metric, the subthreshold slope is also limited by the inability to turn off the transistor. However, these devices could be attractive for RF CMOS applications. But even for analog and RF applications the non-saturating behavior of the drain current can be an issue. Although some studies have reported current saturation, the mechanisms are still not very clear. In this talk we present some of our recent findings, based on simulations and experiments, and propose possible solutions to obtain high on current to off current ratio. A detailed study on high field transport in grapheme transistors, relevant for analog and RF applications will also be presented.

Item Type: Conference Paper
Publisher: IEEE
Department/Centre: Division of Electrical Sciences > Electrical Communication Engineering
Date Deposited: 23 Mar 2013 07:19
Last Modified: 17 Dec 2014 06:37
URI: http://eprints.iisc.ac.in/id/eprint/46054

Actions (login required)

View Item View Item