Bhat, MS and Jamadagni, HS (2004) Complexity Estimation and Network Synthesis based on Functional Smoothness and Entropy Measures. In: IEEE INDICON 2004 First India Annual Conference 2004, 20-22 December, Karagpur, pp. 368-372.
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Abstract
We propose a novel method to estimate the complexity of multiple-valued logic functions based on functional smoothness and information theoretic measures. Further, we show that such complexity measures can be used to (a) estimate the area of the circuit implementation and (b) reduce the search space of potential solutions in evolvable network synthesis.
Item Type: | Conference Paper |
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Publisher: | IEEE |
Additional Information: | �©1990 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE. |
Keywords: | Circuit complexity;Entropy;Multlple-valued logic;Network synthesis |
Department/Centre: | Division of Electrical Sciences > Electronic Systems Engineering (Formerly Centre for Electronic Design & Technology) |
Date Deposited: | 01 Dec 2005 |
Last Modified: | 19 Sep 2010 04:21 |
URI: | http://eprints.iisc.ac.in/id/eprint/4234 |
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