Kulkarni, RK and Srikant, YN (1994) C2G2: a Complete Code Generator Generator. In: Computer Systems and Education. Proceedings of the International Conference on Computer Systems and Education in Honour of Prof. V. Rajaraman, 22-25 June 1994, Bangalore, India, pp. 47-57.
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Describes an environment to produce code generators given the description of the architecture. A new scheme to describe architectures has been tried and a code generator for the Intel i860 has been successfully built using the environment. Tree patterns are used for the specification of semantics and a finite state machine is used to describe the resource details of an architecture. Subroutine linkage information is specified either as a register mapping or as a set of rewrite patterns. The basic instruction selection phase of the code generator is obtained completely automatically and the environment gives most of the architectural details required for machine-specific optimizations. Thus, any optimization module can be plugged in to the code generator. A standard instruction scheduler has been successfully incorporated for the i860 code generator. We feel that with our tool, a code generator with the machine-specific optimizations can be built for a new architecture within six months
| Item Type: | Conference Paper |
|---|---|
| Publisher: | Tata McGraw-Hill |
| Additional Information: | Copyright of this article belongs to Tata McGraw-Hill. |
| Keywords: | compiler generators;finite state machines;microprocessor chips;microprogramming;optimisation;resource allocation; subroutines |
| Department/Centre: | Division of Electrical Sciences > Computer Science & Automation |
| Date Deposited: | 03 Oct 2007 |
| Last Modified: | 11 Jan 2012 09:23 |
| URI: | http://eprints.iisc.ac.in/id/eprint/11016 |
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